Some loads, which are pulse width modulation (PWM) driven during a forward or normal battery condition across a load driver circuit, require protection from an inadvertent application of reverse battery, also referred to herein as a reverse battery condition, across the load driver circuit. For instance, loads that are PWM driven by a load driver circuit that includes switching field effect transistors (FETs) in an H-bridge configuration require an electrical disconnection from a reverse battery path to prevent the destruction of the switching FETs due to a low impedance path through body diodes of the FETS. However, existing techniques or solutions for reverse battery protection have shortcomings.
For example, a simple blocking diode in series with the load driver circuit between a battery supply terminal or node and a voltage common node for a battery prevents current flow through the load driver circuit during a reverse battery condition; but the blocking diode is impractical for high current loads due to power dissipation and reduced headroom. Additionally, some applications use mechanical relays in series with the load driver circuit with blocking diodes in an energizing coil of the relays; but this solution is expensive and is larger relative to other reverse battery protection techniques.
In accordance with other reverse battery protection solutions, inverted FETs are connected in series with the load driver circuit. For example, N-channel FETs can be connected to the voltage common node for the battery, provided that a high enough voltage is provided to the gate of the FET to keep it in enhancement mode during normal battery conditions or operation. However, ground-return currents flowing through the FET produce small voltage drops that can interfere with circuit operation. In another example implementation, a P-channel FET is connected to the battery supply node. However, the most notable disadvantage of this arrangement is the relatively larger size and higher cost over using an N-channel FET. Therefore, in an alternate arrangement, an N-channel FET is connected to the battery supply node. However, the current art requires a dedicated charge pump connected to the gate of this FET to maintain it in enhancement mode during normal battery conditions.
The present disclosure is illustrated by way of example and is not limited by the accompanying figures, in which like reference numbers indicate similar elements. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present disclosure.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein. Also, the functions included in the flow diagrams do not imply a required order of performing the functionality contained therein.